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Re: help with e-probe schematic


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Posted by John, W1TAG on July 24, 2023 at 00:43:02.

In Reply to: help with e-probe schematic posted by swlem3 on July 23, 2023 at 19:33:19.

Ray,

It’s used to set the drain-source current. Too much current can cook the FET, of course. You can monitor the dc voltage across the 100 Ohm source resistor, and calculate the current with Ohm’s Law. Something like 15 mA would be reasonable. The setting can also be used to reduce 2nd order IMD. If you have a couple of strong local AM broadcast signals, tune your receiver to the difference frequency between the two, and see if the pot setting reduces the mixing product. But don’t run the FET too hot. As the schematic notes, you can parallel two J310s so each gets half the current. The penalty is that gate capacitance is doubled, which will work against you at VLF.

John, W1TAG

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